Fully differential amplifiers have been increasingly used in high-speed data systems. For example, differential amplifiers are used to drive the inputs of analog to digital converters (ADC), both Nyquist rate and oversampling sigma-delta converters. Typically, fully differential amplifiers have two inputs and two outputs; the incoming differential signal is amplified and outputted as a differential signal of much larger amplitude. The input differential signal is ideally purely differential, i.e. having the voltage at the two inputs opposite in phase and no common mode voltage components (i.e. the semi sum of the two input signals should be zero). If a common mode component is present, for example when the two inputs are shorted to the same voltage (no differential component), the differential amplifier should reject the common mode component of the input signal and have a differential output voltage that only depends on the input differential voltage, so in this case it should be zero . . . .
Ideally, the differential amplifier does not output a signal when operating under the common mode condition. A circuit implementation of a fully differential amplifier will reject the common mode voltage component with a high efficiency but not completely, causing common mode output drifts and/or common mode to differential signal transposition in response to a change of the input's common mode component. Furthermore, changes in common mode at the input will cause other effects, such as common mode current flow between the output to the input signals, change of operating point of the operational amplifier and of the devices connected to the input network.
If the input signal has an undefined common mode (floating source, differential passive device, transformer, etc.) the amplifier feedback network will be forcing the common mode from the amplifier's output, bringing the input common mode to a well defined level. In such cases any leakage current or component mismatch would influence the common mode level, with the effects described above. Common mode shifts at the input are more likely if the common mode impedance at the input nodes is high, such as when the (equivalent) input resistance and the feedback resistors are large in value or if an integrator stage is realized with the fully differential operational amplifier.
Some common mode current solutions have included an additional circuit attached to the differential amplifier that controls the input common mode voltage to match the output common mode voltage. This approach is disadvantageous in that the input common mode voltage generator or the output common mode control loop had to be matched or offset compensated by an additional circuit that requires additional power and device area.